From: Daniil Gnusarev <gnusarevda@basealt.ru>
To: gnusarevda@basealt.ru, devel-kernel@lists.altlinux.org
Subject: [d-kernel] [PATCH 2/5] pci: baikal-pcie: driver compatibility with SDK earlier than 5.7
Date: Fri, 24 Apr 2026 18:33:23 +0400
Message-ID: <20260424143329.427971-3-gnusarevda@basealt.ru> (raw)
In-Reply-To: <20260424143329.427971-1-gnusarevda@basealt.ru>
In earlier SDKs before version 5.7, there is no "gpr" parameter in
devicetree for PCIe devices. Instead, the specified "lrcu" is used
with the required offset.
Signed-off-by: Daniil Gnusarev <gnusarevda@basealt.ru>
Do-not-upstream: this is a feature of Baikal-M
---
drivers/pci/controller/dwc/pcie-baikal-core.c | 50 +++++++++++--------
1 file changed, 30 insertions(+), 20 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-baikal-core.c b/drivers/pci/controller/dwc/pcie-baikal-core.c
index a85670d124e6a..d67e6cab6e0de 100644
--- a/drivers/pci/controller/dwc/pcie-baikal-core.c
+++ b/drivers/pci/controller/dwc/pcie-baikal-core.c
@@ -124,6 +124,8 @@ static bool baikal_pcie_link_wait_training_done(struct dw_pcie *pci)
#define BM1000_PCIE_HOT_RST BIT(12)
#define BM1000_PCIE_ADB_PWRDWN BIT(13)
+#define BM1000_PCIE_GPR_OFFSET 0x50000
+
#define BM1000_PCIE_GPR_STATUS_BASE 0x04
#define BM1000_PCIE_GPR_STATUS(x) (((x) * 0x20) + BM1000_PCIE_GPR_STATUS_BASE)
@@ -146,6 +148,7 @@ struct bm1000_pcie {
struct dw_pcie *pci;
unsigned int num;
struct regmap *gpr;
+ uintptr_t gpr_offset;
union {
struct gpio_desc *reset_gpio;
struct {
@@ -163,9 +166,9 @@ void bm1000_pcie_phy_enable(struct dw_pcie *pci)
struct bm1000_pcie *bm = dev_get_drvdata(pci->dev);
u32 reg;
- regmap_read(bm->gpr, BM1000_PCIE_GPR_GENCTL(bm->num), ®);
+ regmap_read(bm->gpr, bm->gpr_offset + BM1000_PCIE_GPR_GENCTL(bm->num), ®);
reg |= BM1000_PCIE_PHY_MGMT_ENABLE | BM1000_PCIE_DBI2_MODE;
- regmap_write(bm->gpr, BM1000_PCIE_GPR_GENCTL(bm->num), reg);
+ regmap_write(bm->gpr, bm->gpr_offset + BM1000_PCIE_GPR_GENCTL(bm->num), reg);
}
void bm1000_pcie_phy_disable(struct dw_pcie *pci)
@@ -173,9 +176,9 @@ void bm1000_pcie_phy_disable(struct dw_pcie *pci)
struct bm1000_pcie *bm = dev_get_drvdata(pci->dev);
u32 reg;
- regmap_read(bm->gpr, BM1000_PCIE_GPR_GENCTL(bm->num), ®);
+ regmap_read(bm->gpr, bm->gpr_offset + BM1000_PCIE_GPR_GENCTL(bm->num), ®);
reg &= ~(BM1000_PCIE_PHY_MGMT_ENABLE | BM1000_PCIE_DBI2_MODE);
- regmap_write(bm->gpr, BM1000_PCIE_GPR_GENCTL(bm->num), reg);
+ regmap_write(bm->gpr, bm->gpr_offset + BM1000_PCIE_GPR_GENCTL(bm->num), reg);
}
static int bm1000_get_resources(struct platform_device *pdev,
@@ -187,10 +190,16 @@ static int bm1000_get_resources(struct platform_device *pdev,
struct resource *res;
bm->pci = pci;
+ bm->gpr_offset = 0;
bm->gpr = syscon_regmap_lookup_by_compatible("baikal,bm1000-pcie-gpr");
if (IS_ERR(bm->gpr)) {
- dev_err(dev, "failed to find PCIe GPR registers\n");
- return PTR_ERR(bm->gpr);
+ dev_warn(dev, "failed to find PCIe GPR registers, trying LCRU\n");
+ bm->gpr = syscon_regmap_lookup_by_phandle(dev->of_node, "baikal,pcie-lcru");
+ if (IS_ERR(bm->gpr)) {
+ dev_err(dev, "failed to find PCIe LCRU registers\n");
+ return PTR_ERR(bm->gpr);
+ }
+ bm->gpr_offset = BM1000_PCIE_GPR_OFFSET;
}
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dbi");
@@ -226,11 +235,11 @@ static bool bm1000_pcie_link_up(struct dw_pcie *pci)
struct bm1000_pcie *bm = dev_get_drvdata(pci->dev);
u32 reg;
- regmap_read(bm->gpr, BM1000_PCIE_GPR_GENCTL(bm->num), ®);
+ regmap_read(bm->gpr, bm->gpr_offset + BM1000_PCIE_GPR_GENCTL(bm->num), ®);
if (!(reg & BM1000_PCIE_LTSSM_ENABLE))
return 0;
- regmap_read(bm->gpr, BM1000_PCIE_GPR_STATUS(bm->num), ®);
+ regmap_read(bm->gpr, bm->gpr_offset + BM1000_PCIE_GPR_STATUS(bm->num), ®);
switch (reg & BAIKAL_PCIE_LTSSM_MASK) {
case BAIKAL_PCIE_LTSSM_STATE_L0:
case BAIKAL_PCIE_LTSSM_STATE_L0s:
@@ -246,9 +255,9 @@ static int bm1000_pcie_start_link(struct dw_pcie *pci)
struct bm1000_pcie *bm = dev_get_drvdata(pci->dev);
u32 reg;
- regmap_read(bm->gpr, BM1000_PCIE_GPR_GENCTL(bm->num), ®);
+ regmap_read(bm->gpr, bm->gpr_offset + BM1000_PCIE_GPR_GENCTL(bm->num), ®);
reg |= BM1000_PCIE_LTSSM_ENABLE;
- regmap_write(bm->gpr, BM1000_PCIE_GPR_GENCTL(bm->num), reg);
+ regmap_write(bm->gpr, bm->gpr_offset + BM1000_PCIE_GPR_GENCTL(bm->num), reg);
return 0;
}
@@ -463,9 +472,9 @@ static int bm1000_pcie_host_init(struct dw_pcie_rp *pp)
/* If link is not established yet, reset the RC */
if (!linkup) {
/* Disable link training */
- regmap_read(bm->gpr, BM1000_PCIE_GPR_GENCTL(bm->num), ®);
+ regmap_read(bm->gpr, bm->gpr_offset + BM1000_PCIE_GPR_GENCTL(bm->num), ®);
reg &= ~BM1000_PCIE_LTSSM_ENABLE;
- regmap_write(bm->gpr, BM1000_PCIE_GPR_GENCTL(bm->num), reg);
+ regmap_write(bm->gpr, bm->gpr_offset + BM1000_PCIE_GPR_GENCTL(bm->num), reg);
/* Assert PERST pin */
if (acpi_disabled) {
@@ -489,7 +498,7 @@ static int bm1000_pcie_host_init(struct dw_pcie_rp *pp)
}
/* Reset the RC */
- regmap_read(bm->gpr, BM1000_PCIE_GPR_RESET(bm->num), ®);
+ regmap_read(bm->gpr, bm->gpr_offset + BM1000_PCIE_GPR_RESET(bm->num), ®);
reg |= BM1000_PCIE_NONSTICKY_RST |
BM1000_PCIE_STICKY_RST |
BM1000_PCIE_PWR_RST |
@@ -504,7 +513,7 @@ static int bm1000_pcie_host_init(struct dw_pcie_rp *pp)
reg |= BM1000_PCIE_PIPE_RST;
}
- regmap_write(bm->gpr, BM1000_PCIE_GPR_RESET(bm->num), reg);
+ regmap_write(bm->gpr, bm->gpr_offset + BM1000_PCIE_GPR_RESET(bm->num), reg);
if (!acpi_disabled && bm->num == 2 && bm->gpio[1].is_set) {
/* Assert PRSNT pin */
@@ -520,12 +529,12 @@ static int bm1000_pcie_host_init(struct dw_pcie_rp *pp)
bm1000_pcie_set_gpio(bm->gpio[0].num, bm->gpio[0].polarity);
/* Deassert PHY reset */
- regmap_read(bm->gpr, BM1000_PCIE_GPR_RESET(bm->num), ®);
+ regmap_read(bm->gpr, bm->gpr_offset + BM1000_PCIE_GPR_RESET(bm->num), ®);
reg &= ~BM1000_PCIE_PHY_RST;
- regmap_write(bm->gpr, BM1000_PCIE_GPR_RESET(bm->num), reg);
+ regmap_write(bm->gpr, bm->gpr_offset + BM1000_PCIE_GPR_RESET(bm->num), reg);
/* Deassert all software controlled resets */
- regmap_read(bm->gpr, BM1000_PCIE_GPR_RESET(bm->num), ®);
+ regmap_read(bm->gpr, bm->gpr_offset + BM1000_PCIE_GPR_RESET(bm->num), ®);
reg &= ~(BM1000_PCIE_ADB_PWRDWN |
BM1000_PCIE_HOT_RST |
BM1000_PCIE_NONSTICKY_RST |
@@ -541,7 +550,7 @@ static int bm1000_pcie_host_init(struct dw_pcie_rp *pp)
reg &= ~BM1000_PCIE_PIPE_RST;
}
- regmap_write(bm->gpr, BM1000_PCIE_GPR_RESET(bm->num), reg);
+ regmap_write(bm->gpr, bm->gpr_offset + BM1000_PCIE_GPR_RESET(bm->num), reg);
}
/* Enable error reporting */
@@ -577,11 +586,11 @@ static int bm1000_pcie_host_init(struct dw_pcie_rp *pp)
dw_pcie_writew_dbi(pci, exp_cap_off + PCI_EXP_LNKCTL2, reg);
}
- regmap_read(bm->gpr, BM1000_PCIE_GPR_MSI_TRANS_CTL2, ®);
+ regmap_read(bm->gpr, bm->gpr_offset + BM1000_PCIE_GPR_MSI_TRANS_CTL2, ®);
reg &= ~BM1000_PCIE_MSI_TRANS_RCNUM_MASK(bm->num);
reg |= BM1000_PCIE_MSI_TRANS_RCNUM(bm->num);
reg |= BM1000_PCIE_MSI_TRANS_EN(bm->num);
- regmap_write(bm->gpr, BM1000_PCIE_GPR_MSI_TRANS_CTL2, reg);
+ regmap_write(bm->gpr, bm->gpr_offset + BM1000_PCIE_GPR_MSI_TRANS_CTL2, reg);
/* RX/TX equalizers fine tune */
bm1000_pcie_tune(pci);
@@ -1135,6 +1144,7 @@ static int bm1000_get_acpi_data(struct device *dev, struct bm1000_pcie *bm,
struct acpi_device *adev = to_acpi_device(dev), *res_dev;
int ret;
+ bm->gpr_offset = 0;
bm->gpr = bm1000_pcie_get_gpr_acpi(bm);
if (IS_ERR_OR_NULL(bm->gpr)) {
dev_err(dev, "No PCIe GPR specified\n");
--
2.42.2
next prev parent reply other threads:[~2026-04-24 14:33 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-24 14:33 [d-kernel] [PATCH 0/5] Kernel 6.18 with support for the Baikal-M SoC Daniil Gnusarev
2026-04-24 14:33 ` [d-kernel] [PATCH 1/5] pci: baikal-pcie: add support for PCIe controller for Baikal BE-M1000 Daniil Gnusarev
2026-04-24 14:33 ` Daniil Gnusarev [this message]
2026-04-24 14:33 ` [d-kernel] [PATCH 3/5] pci: baikal-pcie: driver compatibility with SDK versions 5.4 Daniil Gnusarev
2026-04-24 14:33 ` [d-kernel] [PATCH 4/5] pci: baikal-pcie: use raw_spinlock for regmap of gbr registers Daniil Gnusarev
2026-04-24 14:33 ` [d-kernel] [PATCH 5/5] pci: baikal-pcie: forced enable dma-coherent for pcie on Baikal-M Daniil Gnusarev
2026-04-26 6:06 ` [d-kernel] [PATCH 0/5] Kernel 6.18 with support for the Baikal-M SoC Vitaly Chikunov
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