Re: [sisyphus] I: Intel & TTM

["Alexey I. Froloff" <raorn@altlinux.ru>]

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* Alexey I. Froloff <raorn@> [080915 14:23]:
> > Лог в аттаче, ждём факапов.
> Извините.  В аттаче.
Перегрузился в std-def-alt9 и обновил drm.  diff лога в аттаче.

-- 
Regards,
Sir Raorn.

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--- Xorg.TTM.log~	2008-09-15 14:06:43 +0400
+++ Xorg.TTM.log	2008-09-15 14:20:31 +0400
@@ -3,7 +3,7 @@
 Release Date: 
 X Protocol Version 11, Revision 0
 Build Operating System: ALT Linux 4.0 Terminal (OldSchool) i686
-Current Operating System: Linux centaurus.fortress 2.6.25-std-def-alt8 #1 SMP Thu Aug 28 17:47:57 MSD 2008 i686
+Current Operating System: Linux centaurus.fortress 2.6.25-std-def-alt9 #1 SMP Wed Sep 10 13:51:09 MSD 2008 i686
 Build Date: 14 September 2008  05:10:18PM
  
 	Before reporting problems, check https://bugzilla.altlinux.org/
@@ -12,7 +12,7 @@
 Markers: (--) probed, (**) from config file, (==) default setting,
 	(++) from command line, (!!) notice, (II) informational,
 	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
-(==) Log file: "/var/log/Xorg.0.log", Time: Mon Sep 15 14:01:16 2008
+(==) Log file: "/var/log/Xorg.0.log", Time: Mon Sep 15 18:19:41 2008
 (==) Using config file: "/etc/X11/xorg.conf"
 (==) ServerLayout "Minimal layout"
 (**) |-->Screen "Screen0" (0)
@@ -246,12 +246,39 @@
 (II) LoadModule: "ramdac"
 (II) Module "ramdac" already built-in
 (II) intel(0): Comparing regs from server start up to After PreInit
-(WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0xc0000008 to 0xd0000009
-(WW) intel(0): PP_STATUS before: on, ready, sequencing idle
-(WW) intel(0): PP_STATUS after: on, ready, sequencing on
-(WW) intel(0): Register 0x71024 (PIPEBSTAT) changed from 0x00000202 to 0x80000202
-(WW) intel(0): PIPEBSTAT before: status: VSYNC_INT_STATUS VBLANK_INT_STATUS
-(WW) intel(0): PIPEBSTAT after: status: FIFO_UNDERRUN VSYNC_INT_STATUS VBLANK_INT_STATUS
+(WW) intel(0): Register 0x70024 (PIPEASTAT) changed from 0x80000a03 to 0x00000000
+(WW) intel(0): PIPEASTAT before: status: FIFO_UNDERRUN GMBUS_INT_STATUS VSYNC_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS
+(WW) intel(0): PIPEASTAT after: status:
+(WW) intel(0): Register 0x68000 (TV_CTL) changed from 0x10000000 to 0x000c0c00
+(WW) intel(0): Register 0x68010 (TV_CSC_Y) changed from 0x00000000 to 0x0332012d
+(WW) intel(0): Register 0x68014 (TV_CSC_Y2) changed from 0x00000000 to 0x07d30104
+(WW) intel(0): Register 0x68018 (TV_CSC_U) changed from 0x00000000 to 0x0733052d
+(WW) intel(0): Register 0x6801c (TV_CSC_U2) changed from 0x00000000 to 0x05c70200
+(WW) intel(0): Register 0x68020 (TV_CSC_V) changed from 0x00000000 to 0x0340030c
+(WW) intel(0): Register 0x68024 (TV_CSC_V2) changed from 0x00000000 to 0x06d00200
+(WW) intel(0): Register 0x68028 (TV_CLR_KNOBS) changed from 0x00000000 to 0x00606000
+(WW) intel(0): Register 0x6802c (TV_CLR_LEVEL) changed from 0x00000000 to 0x010b00e1
+(WW) intel(0): Register 0x68030 (TV_H_CTL_1) changed from 0x00000000 to 0x00400359
+(WW) intel(0): Register 0x68034 (TV_H_CTL_2) changed from 0x00000000 to 0x80480022
+(WW) intel(0): Register 0x68038 (TV_H_CTL_3) changed from 0x00000000 to 0x007c0344
+(WW) intel(0): Register 0x6803c (TV_V_CTL_1) changed from 0x00000000 to 0x00f01415
+(WW) intel(0): Register 0x68040 (TV_V_CTL_2) changed from 0x00000000 to 0x00060607
+(WW) intel(0): Register 0x68044 (TV_V_CTL_3) changed from 0x00000000 to 0x80120001
+(WW) intel(0): Register 0x68048 (TV_V_CTL_4) changed from 0x00000000 to 0x000900f0
+(WW) intel(0): Register 0x6804c (TV_V_CTL_5) changed from 0x00000000 to 0x000a00f0
+(WW) intel(0): Register 0x68050 (TV_V_CTL_6) changed from 0x00000000 to 0x000900f0
+(WW) intel(0): Register 0x68054 (TV_V_CTL_7) changed from 0x00000000 to 0x000a00f0
+(WW) intel(0): Register 0x68060 (TV_SC_CTL_1) changed from 0x00000000 to 0xc1710088
+(WW) intel(0): Register 0x68064 (TV_SC_CTL_2) changed from 0x00000000 to 0x4e2d1dc8
+(WW) intel(0): Register 0x68070 (TV_WIN_POS) changed from 0x00000000 to 0x00360024
+(WW) intel(0): Register 0x68074 (TV_WIN_SIZE) changed from 0x00000000 to 0x02640198
+(WW) intel(0): Register 0x68080 (TV_FILTER_CTL_1) changed from 0x00000000 to 0x800010bb
+(WW) intel(0): Register 0x68084 (TV_FILTER_CTL_2) changed from 0x00000000 to 0x00028283
+(WW) intel(0): Register 0x68088 (TV_FILTER_CTL_3) changed from 0x00000000 to 0x00014141
+(WW) intel(0): Register 0x68100 (TV_H_LUMA_0) changed from 0x00000000 to 0xb1403000
+(WW) intel(0): Register 0x681ec (TV_H_LUMA_59) changed from 0x00000000 to 0x0000b060
+(WW) intel(0): Register 0x68200 (TV_H_CHROMA_0) changed from 0x00000000 to 0xb1403000
+(WW) intel(0): Register 0x682ec (TV_H_CHROMA_59) changed from 0x00000000 to 0x0000b060
 (==) Depth 24 pixmap format is 32 bpp
 (II) do I need RAC?  No, I don't.
 (II) resource ranges after preInit:
@@ -269,14 +296,19 @@
 (II) intel(0): Kernel reported 110080 total, 1 used
 (II) intel(0): I830CheckAvailableMemory: 440316 kB available
 drmOpenDevice: node name is /dev/dri/card0
-drmOpenDevice: open result is 11, (OK)
+drmOpenDevice: open result is -1, (No such device or address)
+drmOpenDevice: open result is -1, (No such device or address)
+drmOpenDevice: Open failed
 drmOpenDevice: node name is /dev/dri/card0
-drmOpenDevice: open result is 11, (OK)
+drmOpenDevice: open result is -1, (No such device or address)
+drmOpenDevice: open result is -1, (No such device or address)
+drmOpenDevice: Open failed
 drmOpenByBusid: Searching for BusID pci:0000:00:02.0
 drmOpenDevice: node name is /dev/dri/card0
 drmOpenDevice: open result is 11, (OK)
 drmOpenByBusid: drmOpenMinor returns 11
 drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0
+(II) [drm] loaded kernel module for "i915" driver.
 (II) [drm] DRM interface version 1.3
 (II) [drm] DRM open master succeeded.
 (II) intel(0): [drm] Using the DRM lock SAREA also for drawables.
@@ -329,9 +361,6 @@
 (II) intel(0): 0x03000000-0x03ffffff: front buffer (16384 kB) X tiled
 (II) intel(0): 0x04000000-0x04007fff: logical 3D context (32 kB)
 (II) intel(0): 0x0a9f4000:            end of memory manager
-(WW) intel(0): ESR is 0x00000010, page table error
-(WW) intel(0): PGTBL_ER is 0x00000010, display A pte
-(WW) intel(0): Existing errors found in hardware state.
 (II) intel(0): using SSC reference clock of 100 MHz
 (II) intel(0): Selecting standard 18 bit TMDS pixel format.
 (II) intel(0): Output configuration:

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