From: asheplyakov@yandex.ru
To: devel@lists.altlinux.org
Cc: Vitaly Chikunov <vt@altlinux.org>, Igor Chudov <nir@basealt.ru>,
Alexey Sheplyakov <asheplyakov@altlinux.org>,
Evgeny Sinelnikov <sin@basealt.ru>
Subject: [devel] [PATCH 15/35] dw-hdmi-ahb-audio: support Baikal-M SoC
Date: Fri, 20 May 2022 20:28:29 +0400
Message-ID: <20220520162849.1554351-16-asheplyakov@yandex.ru> (raw)
In-Reply-To: <20220520162849.1554351-1-asheplyakov@yandex.ru>
From: Alexey Sheplyakov <asheplyakov@altlinux.org>
X-feature-Baikal-M
---
.../drm/bridge/synopsys/dw-hdmi-ahb-audio.c | 106 ++++++++++++------
.../gpu/drm/bridge/synopsys/dw-hdmi-audio.h | 1 +
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 6 +
3 files changed, 78 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c
index 7d2ed0ed2fe2..8ea999aac4bf 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c
@@ -132,12 +132,45 @@ struct snd_dw_hdmi {
u8 cs[192][8];
};
-static void dw_hdmi_writel(u32 val, void __iomem *ptr)
+static inline void dw_hdmi_writeb_relaxed(u8 value, const struct dw_hdmi_audio_data *data, int offset)
{
- writeb_relaxed(val, ptr);
- writeb_relaxed(val >> 8, ptr + 1);
- writeb_relaxed(val >> 16, ptr + 2);
- writeb_relaxed(val >> 24, ptr + 3);
+ void __iomem *base = data->base;
+ if (data->reg_offset != 0)
+ offset <<= data->reg_offset;
+ writeb_relaxed(value, base + offset);
+}
+
+static inline void dw_hdmi_writeb(u8 value, const struct dw_hdmi_audio_data *data, int offset)
+{
+ void __iomem *base = data->base;
+ if (data->reg_offset != 0)
+ offset <<= data->reg_offset;
+ writeb(value, base + offset);
+}
+
+static inline u8 dw_hdmi_readb(const struct dw_hdmi_audio_data *data, int offset)
+{
+ void __iomem *base = data->base;
+ if (data->reg_offset != 0)
+ offset <<= data->reg_offset;
+ return readb(base + offset);
+
+}
+
+static inline u8 dw_hdmi_readb_relaxed(const struct dw_hdmi_audio_data *data, int offset)
+{
+ void __iomem *base = data->base;
+ if (data->reg_offset != 0)
+ offset <<= data->reg_offset;
+ return readb_relaxed(base + offset);
+}
+
+static void dw_hdmi_writel(u32 val, const struct dw_hdmi_audio_data *data, int offset)
+{
+ dw_hdmi_writeb_relaxed(val, data, offset);
+ dw_hdmi_writeb_relaxed(val >> 8, data, offset + 1);
+ dw_hdmi_writeb_relaxed(val >> 16, data, offset + 2);
+ dw_hdmi_writeb_relaxed(val >> 24, data, offset + 3);
}
/*
@@ -232,7 +265,6 @@ static void dw_hdmi_create_cs(struct snd_dw_hdmi *dw,
static void dw_hdmi_start_dma(struct snd_dw_hdmi *dw)
{
- void __iomem *base = dw->data.base;
unsigned offset = dw->buf_offset;
unsigned period = dw->buf_period;
u32 start, stop;
@@ -240,18 +272,18 @@ static void dw_hdmi_start_dma(struct snd_dw_hdmi *dw)
dw->reformat(dw, offset, period);
/* Clear all irqs before enabling irqs and starting DMA */
- writeb_relaxed(HDMI_IH_AHBDMAAUD_STAT0_ALL,
- base + HDMI_IH_AHBDMAAUD_STAT0);
+ dw_hdmi_writeb_relaxed(HDMI_IH_AHBDMAAUD_STAT0_ALL,
+ &dw->data, HDMI_IH_AHBDMAAUD_STAT0);
start = dw->buf_addr + offset;
stop = start + period - 1;
/* Setup the hardware start/stop addresses */
- dw_hdmi_writel(start, base + HDMI_AHB_DMA_STRADDR0);
- dw_hdmi_writel(stop, base + HDMI_AHB_DMA_STPADDR0);
+ dw_hdmi_writel(start, &dw->data, HDMI_AHB_DMA_STRADDR0);
+ dw_hdmi_writel(stop, &dw->data, HDMI_AHB_DMA_STPADDR0);
- writeb_relaxed((u8)~HDMI_AHB_DMA_MASK_DONE, base + HDMI_AHB_DMA_MASK);
- writeb(HDMI_AHB_DMA_START_START, base + HDMI_AHB_DMA_START);
+ dw_hdmi_writeb_relaxed((u8)~HDMI_AHB_DMA_MASK_DONE, &dw->data, HDMI_AHB_DMA_MASK);
+ dw_hdmi_writeb(HDMI_AHB_DMA_START_START, &dw->data, HDMI_AHB_DMA_START);
offset += period;
if (offset >= dw->buf_size)
@@ -262,8 +294,8 @@ static void dw_hdmi_start_dma(struct snd_dw_hdmi *dw)
static void dw_hdmi_stop_dma(struct snd_dw_hdmi *dw)
{
/* Disable interrupts before disabling DMA */
- writeb_relaxed(~0, dw->data.base + HDMI_AHB_DMA_MASK);
- writeb_relaxed(HDMI_AHB_DMA_STOP_STOP, dw->data.base + HDMI_AHB_DMA_STOP);
+ dw_hdmi_writeb_relaxed(~0, &dw->data, HDMI_AHB_DMA_MASK);
+ dw_hdmi_writeb_relaxed(HDMI_AHB_DMA_STOP_STOP, &dw->data, HDMI_AHB_DMA_STOP);
}
static irqreturn_t snd_dw_hdmi_irq(int irq, void *data)
@@ -272,11 +304,11 @@ static irqreturn_t snd_dw_hdmi_irq(int irq, void *data)
struct snd_pcm_substream *substream;
unsigned stat;
- stat = readb_relaxed(dw->data.base + HDMI_IH_AHBDMAAUD_STAT0);
+ stat = dw_hdmi_readb_relaxed(&dw->data, HDMI_IH_AHBDMAAUD_STAT0);
if (!stat)
return IRQ_NONE;
- writeb_relaxed(stat, dw->data.base + HDMI_IH_AHBDMAAUD_STAT0);
+ dw_hdmi_writeb_relaxed(stat, &dw->data, HDMI_IH_AHBDMAAUD_STAT0);
substream = dw->substream;
if (stat & HDMI_IH_AHBDMAAUD_STAT0_DONE && substream) {
@@ -319,7 +351,6 @@ static int dw_hdmi_open(struct snd_pcm_substream *substream)
{
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_dw_hdmi *dw = substream->private_data;
- void __iomem *base = dw->data.base;
u8 *eld;
int ret;
@@ -349,16 +380,16 @@ static int dw_hdmi_open(struct snd_pcm_substream *substream)
return ret;
/* Clear FIFO */
- writeb_relaxed(HDMI_AHB_DMA_CONF0_SW_FIFO_RST,
- base + HDMI_AHB_DMA_CONF0);
+ dw_hdmi_writeb_relaxed(HDMI_AHB_DMA_CONF0_SW_FIFO_RST,
+ &dw->data, HDMI_AHB_DMA_CONF0);
/* Configure interrupt polarities */
- writeb_relaxed(~0, base + HDMI_AHB_DMA_POL);
- writeb_relaxed(~0, base + HDMI_AHB_DMA_BUFFPOL);
+ dw_hdmi_writeb_relaxed(~0, &dw->data, HDMI_AHB_DMA_POL);
+ dw_hdmi_writeb_relaxed(~0, &dw->data, HDMI_AHB_DMA_BUFFPOL);
/* Keep interrupts masked, and clear any pending */
- writeb_relaxed(~0, base + HDMI_AHB_DMA_MASK);
- writeb_relaxed(~0, base + HDMI_IH_AHBDMAAUD_STAT0);
+ dw_hdmi_writeb_relaxed(~0, &dw->data, HDMI_AHB_DMA_MASK);
+ dw_hdmi_writeb_relaxed(~0, &dw->data, HDMI_IH_AHBDMAAUD_STAT0);
ret = request_irq(dw->data.irq, snd_dw_hdmi_irq, IRQF_SHARED,
"dw-hdmi-audio", dw);
@@ -366,9 +397,9 @@ static int dw_hdmi_open(struct snd_pcm_substream *substream)
return ret;
/* Un-mute done interrupt */
- writeb_relaxed(HDMI_IH_MUTE_AHBDMAAUD_STAT0_ALL &
- ~HDMI_IH_MUTE_AHBDMAAUD_STAT0_DONE,
- base + HDMI_IH_MUTE_AHBDMAAUD_STAT0);
+ dw_hdmi_writeb_relaxed(HDMI_IH_MUTE_AHBDMAAUD_STAT0_ALL &
+ ~HDMI_IH_MUTE_AHBDMAAUD_STAT0_DONE,
+ &dw->data, HDMI_IH_MUTE_AHBDMAAUD_STAT0);
return 0;
}
@@ -378,8 +409,8 @@ static int dw_hdmi_close(struct snd_pcm_substream *substream)
struct snd_dw_hdmi *dw = substream->private_data;
/* Mute all interrupts */
- writeb_relaxed(HDMI_IH_MUTE_AHBDMAAUD_STAT0_ALL,
- dw->data.base + HDMI_IH_MUTE_AHBDMAAUD_STAT0);
+ dw_hdmi_writeb_relaxed(HDMI_IH_MUTE_AHBDMAAUD_STAT0_ALL,
+ &dw->data, HDMI_IH_MUTE_AHBDMAAUD_STAT0);
free_irq(dw->data.irq, dw);
@@ -420,6 +451,11 @@ static int dw_hdmi_prepare(struct snd_pcm_substream *substream)
HDMI_AHB_DMA_CONF0_INCR8;
threshold = 128;
break;
+ case 0x2a: /* this revision is used in Baikal-M SoC */
+ conf0 = HDMI_AHB_DMA_CONF0_BURST_MODE |
+ HDMI_AHB_DMA_CONF0_INCR16;
+ threshold = 128;
+ break;
default:
/* NOTREACHED */
return -EINVAL;
@@ -434,9 +470,9 @@ static int dw_hdmi_prepare(struct snd_pcm_substream *substream)
conf1 = default_hdmi_channel_config[runtime->channels - 2].conf1;
ca = default_hdmi_channel_config[runtime->channels - 2].ca;
- writeb_relaxed(threshold, dw->data.base + HDMI_AHB_DMA_THRSLD);
- writeb_relaxed(conf0, dw->data.base + HDMI_AHB_DMA_CONF0);
- writeb_relaxed(conf1, dw->data.base + HDMI_AHB_DMA_CONF1);
+ dw_hdmi_writeb_relaxed(threshold, &dw->data, HDMI_AHB_DMA_THRSLD);
+ dw_hdmi_writeb_relaxed(conf0, &dw->data, HDMI_AHB_DMA_CONF0);
+ dw_hdmi_writeb_relaxed(conf1, &dw->data, HDMI_AHB_DMA_CONF1);
dw_hdmi_set_channel_count(dw->data.hdmi, runtime->channels);
dw_hdmi_set_channel_allocation(dw->data.hdmi, ca);
@@ -528,10 +564,10 @@ static int snd_dw_hdmi_probe(struct platform_device *pdev)
unsigned revision;
int ret;
- writeb_relaxed(HDMI_IH_MUTE_AHBDMAAUD_STAT0_ALL,
- data->base + HDMI_IH_MUTE_AHBDMAAUD_STAT0);
- revision = readb_relaxed(data->base + HDMI_REVISION_ID);
- if (revision != 0x0a && revision != 0x1a) {
+ dw_hdmi_writeb_relaxed(HDMI_IH_MUTE_AHBDMAAUD_STAT0_ALL,
+ data, HDMI_IH_MUTE_AHBDMAAUD_STAT0);
+ revision = dw_hdmi_readb_relaxed(data, HDMI_REVISION_ID);
+ if (revision != 0x0a && revision != 0x1a && revision != 0x2a) {
dev_err(dev, "dw-hdmi-audio: unknown revision 0x%02x\n",
revision);
return -ENXIO;
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h
index f72d27208ebe..bc8468fe52a0 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-audio.h
@@ -10,6 +10,7 @@ struct dw_hdmi_audio_data {
int irq;
struct dw_hdmi *hdmi;
u8 *(*get_eld)(struct dw_hdmi *hdmi);
+ unsigned reg_offset;
};
struct dw_hdmi_i2s_audio_data {
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index 97cdc61b57f6..311812f31418 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
@@ -3442,6 +3442,12 @@ struct dw_hdmi *dw_hdmi_probe(struct platform_device *pdev,
audio.irq = irq;
audio.hdmi = hdmi;
audio.get_eld = hdmi_audio_get_eld;
+ audio.reg_offset = 0;
+ if (of_device_is_compatible(np, "baikal,hdmi")) {
+ audio.reg_offset = 2;
+ dev_info(dev, "setting audio.reg_offset=%d for BE-M1000 SoC\n",
+ audio.reg_offset);
+ }
hdmi->enable_audio = dw_hdmi_ahb_audio_enable;
hdmi->disable_audio = dw_hdmi_ahb_audio_disable;
--
2.32.0
next prev parent reply other threads:[~2022-05-20 16:28 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-20 16:28 [devel] kernel-image-un-def: Baikal-M asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 01/35] net: stmmac: inital support of Baikal-T1/M SoCs GMAC asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 02/35] dt-bindings: dwmac: Add bindings for Baikal-T1/M SoCs asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 03/35] net: stmmac: custom mdio reset for some Baikal-M boards asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 04/35] net: dwmac-baikal: added compatible strings asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 05/35] hwmon: bt1-pvt: access registers via pvt_{readl, writel} helpers asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 06/35] hwmon: bt1-pvt: define pvt_readl/pvt_writel for Baikal-M SoC asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 07/35] hwmon: bt1-pvt: adjusted probing " asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 08/35] hwmon: bt1-pvt: added compatible baikal,pvt asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 09/35] clk: added Baikal-M clock management unit driver asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 10/35] cpufreq-dt: don't load on Baikal-M SoC asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 11/35] usb: dwc3: of-simple: added compatible string for " asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 12/35] arm64: Enable armv8 based Baikal-M SoC support asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 13/35] drm: new bridge driver - stdp4028 asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 14/35] drm: added Baikal-M SoC video display unit driver asheplyakov
2022-05-20 16:28 ` asheplyakov [this message]
2022-05-20 16:28 ` [devel] [PATCH 16/35] Added TF307/TF306 board management controller driver asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 17/35] ALSA: hda: Baikal-M support asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 18/35] [rejected] serial: 8250_dw: verify clock rate in dw8250_set_termios asheplyakov
2022-05-20 16:53 ` Andy Shevchenko
2022-05-20 16:28 ` [devel] [PATCH 19/35] drm/panfrost: forcibly set dma-coherent on Baikal-M asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 20/35] drm/panfrost: disable devfreq " asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 21/35] pm: disable all sleep states on Baikal-M based boards asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 22/35] arm64-stub: fixed secondary cores boot on Baikal-M SoC asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 23/35] efi-rtc: avoid calling efi.get_time " asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 24/35] net: fwnode_get_phy_id: consider all compatible strings asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 25/35] (BROKEN) dwc-i2s: support Baikal-M SoC asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 26/35] input: added TF307 serio PS/2 emulator driver asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 27/35] arm64: added Baikal-M SoC and TF307 board device tree asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 28/35] arm64: device tree: baikal: mark GPU as dma-coherent asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 29/35] arm64: device tree: Baikal-M: fixed PHY binding description asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 30/35] arm64: device tree: Baikal-M: fixed gpio alias asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 31/35] arm64: device tree: Baikal-M: fixed GPU opp_table asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 32/35] arm64: device tree: Baikal-M: fixed CPUs opp_table asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 33/35] arm64: defconfig for Baikal-M support testing asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 34/35] config-aarch64: enable more Baikal-M related drivers asheplyakov
2022-05-20 16:28 ` [devel] [PATCH 35/35] 1:5.17.9-alt2 asheplyakov
2022-05-21 4:04 ` P X
2022-05-21 16:50 ` Alexey Sheplyakov
2022-05-21 16:55 ` [devel] devel-kernel@ Антон Мидюков
2022-05-22 5:51 ` [devel] [PATCH 35/35] 1:5.17.9-alt2 Dmitry V. Levin
2022-05-23 8:51 ` Alexey Sheplyakov
2022-05-23 9:58 ` Dmitry V. Levin
2022-05-23 11:21 ` Alexey Gladkov
2022-05-23 9:47 ` [devel] Baikal-M patches for et101, aqbm1000, tf307 Evgeny Sinelnikov
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