From: antohami@basealt.ru To: devel-kernel@lists.altlinux.org Subject: [d-kernel] [PATCH 1/1] arm64: add dts for SoM NMS-SM-RK3568 and computer VSNF.466459.001 on its basis Date: Wed, 21 Aug 2024 20:07:32 +0300 Message-ID: <934bc4c5026966230ad0bb6b31d2ee179a041f1c.1724259302.git.antohami@altlinux.org> (raw) In-Reply-To: <cover.1724259302.git.antohami@altlinux.org> From: Anton Midyukov <antohami@altlinux.org> Tested with kernel 6.11.0-rc3. Link: https://github.com/A-TELEMATIKA/rk3568-telematika-smtm Signed-off-by: Anton Midyukov <antohami@altlinux.org> --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../rockchip/rk3568-inmys-smarc-som_v2.dtsi | 686 ++++++++++++++++++ .../dts/rockchip/rk3568-telematika-smtm.dts | 368 ++++++++++ 3 files changed, 1055 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-inmys-smarc-som_v2.dtsi create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-telematika-smtm.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index fda1b980eb4bc..c03666adc6bd3 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -145,3 +145,4 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-nanopi-r6s.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-nanopi-r6c.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5a.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-orangepi-5.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-telematika-smtm.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3568-inmys-smarc-som_v2.dtsi b/arch/arm64/boot/dts/rockchip/rk3568-inmys-smarc-som_v2.dtsi new file mode 100644 index 0000000000000..40693bfc0afb6 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3568-inmys-smarc-som_v2.dtsi @@ -0,0 +1,686 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include <dt-bindings/soc/rockchip,vop2.h> +#include "rk3568.dtsi" +//#include "rockchip/rk3568.dtsi" + +/ { + model = "NMS-SM-RK3568"; + compatible = "inmys,rk3568-smarc-som_v2", "inmys,rk3568-smarc-som", "rockchip,rk3568"; + + aliases { + ethernet0 = &gmac0; /*SMARC: GBE0*/ + ethernet1 = &gmac1; /*SMARC: GBE1*/ + mmc0 = &sdhci; /*emmc*/ + mmc1 = &sdmmc0; /*sdcard*/ + rtc0 = &rtc68; + rtc1 = &rk809; + can0 = &can0; /*SMARC: can0*/ + can1 = &can2; /*SMARC: can1*/ + }; + + chosen: chosen { + stdout-path = "serial2:1500000n8"; + }; + + leds { + compatible = "gpio-leds"; + + led_user: led_user { + gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; + + smarc_vdd_in: smarc-vdd-in { + /* 3.0...5.25V main power input for som(from mother board) */ + compatible = "regulator-fixed"; + regulator-name = "SMARC_VDD_IN"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + V3P3: SMARC_CARRIER_PWR_ON { + /* enable 3v3 main power on mother board, by pmic pin "EXT_EN" */ + /* CARRIER_PWR_ON->S154->CARRIER_PWR_ON */ + compatible = "regulator-fixed"; + regulator-name = "SMARC_CARRIER_PWR_ON"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + }; + vcc_5v_boost: vcc-5v-boost { + /* boost from SMARC VDD_IN( 3.0V ... 5.25V) to 5V */ + /* variants: 0R or FAN48623UC50X */ + compatible = "regulator-fixed"; + regulator-name = "VCC_5V_BOOST"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&smarc_vdd_in>; + }; + vcc_3v3_in: vcc-3v3-in { + /* 3v3 input for pmic (for LDOs)*/ + /* NCP1597BMNTWG (5V->3v3) on som*/ + compatible = "regulator-fixed"; + regulator-name = "VCC_3V3_IN"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_5v_boost>; + }; + + vdd_cpu: vdd-cpu { + /* FAN53200UC35X */ + vin-supply = <&smarc_vdd_in>; + compatible = "regulator-fixed"; + regulator-name = "vdd_cpu"; + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1150000>; + regulator-boot-on; + regulator-always-on; + }; +}; + +&cpu0 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply = <&vdd_cpu>; +}; + + +&mdio0 { + rgmii_phy0: phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x0>; + }; +}; + +&gmac0 { + phy-mode = "rgmii-id"; + + snps,reset-gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + /* Reset time is 20ms, 100ms for rtl8211f */ + snps,reset-delays-us = <0 20000 100000>; + + clock_in_out = "output"; + assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; + assigned-clock-rates = <0>, <125000000>; + pinctrl-names = "default"; + pinctrl-0 = <&gmac0_miim + &gmac0_tx_bus2 + &gmac0_rx_bus2 + &gmac0_rgmii_clk + &gmac0_rgmii_bus>; + + tx_delay = <0x3c>; + rx_delay = <0x2f>; + + phy-handle = <&rgmii_phy0>; +}; + +&mdio1 { + rgmii_phy1: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x0>; +#if 0 + reset-assert-us = <20000>; + reset-deassert-us = <100000>; + reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; +#endif + }; +}; + +&gmac1 { + phy-mode = "rgmii-id"; + + snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + /* Reset time is 20ms, 100ms for rtl8211f */ + snps,reset-delays-us = <0 20000 100000>; + + clock_in_out = "output"; + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>; + assigned-clock-rates = <0>, <125000000>; + pinctrl-names = "default"; + pinctrl-0 = <&gmac1m1_miim + &gmac1m1_tx_bus2 + &gmac1m1_rx_bus2 + &gmac1m1_rgmii_clk + &gmac1m1_rgmii_bus>; + + tx_delay = <0x4f>; + rx_delay = <0x26>; + + phy-handle = <&rgmii_phy1>; +}; + +&gpu { + mali-supply = <&vdd_gpu>; +}; + +&hdmi { + avdd-0v9-supply = <&vdda0v9_image>; + avdd-1v8-supply = <&vcca1v8_image>; + pinctrl-0 = <&hdmitx_scl &hdmitx_sda>; // no HDMI CEC pin on SMARC connector (&hdmitxm0_cec) +}; + +&i2c0 { + status = "okay"; +#if 0 + vdd_cpu: regulator@1c { + compatible = "tcs,tcs4525"; + reg = <0x1c>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1150000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +#endif + + rk809: pmic@20 { + compatible = "rockchip,rk809"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; + assigned-clocks = <&cru I2S1_MCLKOUT_TX>; + assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; + #clock-cells = <1>; + clock-names = "mclk"; + clocks = <&cru I2S1_MCLKOUT_TX>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int &i2s1m0_mclk>; + rockchip,system-power-controller; + #sound-dai-cells = <0>; + vcc1-supply = <&smarc_vdd_in>; + vcc2-supply = <&smarc_vdd_in>; + vcc3-supply = <&smarc_vdd_in>; + vcc4-supply = <&smarc_vdd_in>; + vcc5-supply = <&vcc_3v3_in>; + vcc6-supply = <&vcc_3v3_in>; + vcc7-supply = <&vcc_3v3_in>; + vcc8-supply = <&vcc_3v3_in>; + vcc9-supply = <&vcc_3v3_in>; + wakeup-source; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name = "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-name = "vdd_gpu"; + regulator-always-on; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_npu: DCDC_REG4 { + regulator-name = "vdd_npu"; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG5 { + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdda0v9_image: LDO_REG1 { + regulator-name = "vdda0v9_image"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-name = "vdda_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-name = "vdda0v9_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-name = "vccio_acodec"; + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-name = "vccio_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-name = "vcc3v3_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca_1v8: LDO_REG7 { + regulator-name = "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pmu: LDO_REG8 { + regulator-name = "vcca1v8_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca1v8_image: LDO_REG9 { + regulator-name = "vcca1v8_image"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3: SWITCH_REG1 { + regulator-name = "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sd: SWITCH_REG2 { + regulator-name = "vcc3v3_sd"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + + codec { + mic-in-differential; + }; + }; +}; + +&i2c5 { + status = "okay"; + + rtc68: pcf8523@68 { + compatible = "nxp,pcf8523"; + reg = <0x68>; + quartz-load-femtofarads = <12500>; + /*rtcint GPIO0_D3*/ + }; +}; + + +&i2s1_8ch { /* SMARC pins: S39 - S52*/ + pinctrl-names = "default"; + pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_lrcktx &i2s1m0_sdi0 &i2s1m0_sdo0>; + rockchip,trcm-sync-tx-only; + status = "disabled"; +}; + +&pcie2x1 { + reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&V3P3>; + status = "disabled"; +}; + + +&pcie30phy { + status = "disabled"; +}; + +&pcie3x2 { + reset-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&V3P3>; + status = "disabled"; +}; + + +&pinctrl { + pmic { + pmic_int: pmic_int { + rockchip,pins = + <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + +&pmu_io_domains { + pmuio1-supply = <&vcc3v3_pmu>; + pmuio2-supply = <&vcc_1v8>; + vccio1-supply = <&vcc_1v8>; + vccio2-supply = <&vcc_1v8>; + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcc_1v8>; + vccio5-supply = <&vcc_3v3>; + vccio6-supply = <&vcc_1v8>; + vccio7-supply = <&vcc_1v8>; + status = "okay"; +}; + +&saradc { + vref-supply = <&vcca_1v8>; + status = "okay"; +}; + +/*emmc on som*/ +&sdhci { + bus-width = <8>; + max-frequency = <160000000>; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vcc_1v8>; + status = "okay"; +}; + +/* has no sdcard in device, but has in evm board: rm? */ +&sdmmc0 { + bus-width = <4>; + cap-sd-highspeed; + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; + disable-wp; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; + sd-uhs-sdr50; + vmmc-supply = <&vcc3v3_sd>; + vqmmc-supply = <&vccio_sd>; + status = "disabled"; +}; + +&tsadc { + rockchip,hw-tshut-mode = <1>; + rockchip,hw-tshut-polarity = <0>; + status = "okay"; +}; + +/* SMARC: SER1 (console) */ +&uart2 { + status = "okay"; +}; + +&vop { + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; + status = "disabled"; +}; + +&vop_mmu { + status = "disabled"; +}; + +/* SMARC: SATA1 */ +&sata1 { + /* enable sata1_actled */ + pinctrl-names = "default"; + pinctrl-0 = <&sata1_pins>; +}; + +/* SMARC: I2C_GP*/ +&i2c3 { + pinctrl-0 = <&i2c3m0_xfer>; + status = "okay"; + eeprom50: eeprom@50 { + compatible = "atmel,24c02"; + reg = <0x50>; + }; +}; + +/* SMARC: I2C_CAM0*/ +&i2c4 { + pinctrl-0 = <&i2c4m0_xfer>; +}; + +/* SMARC: SER2 */ +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&uart4m1_xfer>; +}; + +/* SMARC: SER3 */ +&uart5 { + pinctrl-names = "default"; + pinctrl-0 = <&uart5m1_xfer>; +}; + +/* SMARC: SER0 */ +&uart8 { + pinctrl-names = "default"; + pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn &uart8m0_rtsn>; +}; + +&spi0 { + pinctrl-0 = <&spi0m0_cs0 &spi0m0_pins>; + pinctrl-0 = <&spi0m0_cs0_hs &spi0m0_pins_hs>; +}; + +&gpio0 { + gpio-line-names = + "GPIO0_A0","GPIO0_A1","GPIO0_A2","GPIO0_A3","GPIO0_A4","GPIO0_A5","GPIO0_A6","GPIO0_A7", + "GPIO0_B0","GPIO0_B1","GPIO0_B2","GPIO0_B3","GPIO0_B4","GPIO0_B5","GPIO0_B6","GPIO0_B7", + "GPIO0_C0","GPIO0_C1","GPIO0_C2","GPIO0_C3","GPIO0_C4","GPIO0_C5","GPIO0_C6","GPIO0_C7", + "GPIO0_D0","GPIO0_D1","GPIO0_D2","GPIO0_D3","GPIO0_D4","GPIO0_D5","GPIO0_D6","GPIO0_D7"; +}; + +&gpio1 { + gpio-line-names = + "GPIO1_A0","GPIO1_A1","GPIO1_A2","GPIO1_A3","GPIO1_A4","GPIO1_A5","GPIO1_A6","GPIO1_A7", + "GPIO1_B0","GPIO1_B1","GPIO1_B2","GPIO1_B3","GPIO1_B4","GPIO1_B5","GPIO1_B6","GPIO1_B7", + "GPIO1_C0","GPIO1_C1","GPIO1_C2","GPIO1_C3","GPIO1_C4","GPIO1_C5","GPIO1_C6","GPIO1_C7", + "GPIO1_D0","GPIO1_D1","SMARC_GPIO10","GPIO1_D3","SMARC_GPIO11","GPIO1_D5","GPIO1_D6","GPIO1_D7"; // GPIO10 GPIO11 only on som version v2! +}; + +&gpio2 { + gpio-line-names = + "GPIO2_A0","GPIO2_A1","GPIO2_A2","GPIO2_A3","GPIO2_A4","GPIO2_A5","GPIO2_A6","GPIO2_A7", + "GPIO2_B0","GPIO2_B1","GPIO2_B2","GPIO2_B3","GPIO2_B4","GPIO2_B5","GPIO2_B6","GPIO2_B7", + "GPIO2_C0","GPIO2_C1","GPIO2_C2","GPIO2_C3","GPIO2_C4","GPIO2_C5","GPIO2_C6","GPIO2_C7", + "GPIO2_D0","GPIO2_D1","GPIO2_D2","GPIO2_D3","GPIO2_D4","GPIO2_D5","GPIO2_D6","GPIO2_D7"; +}; + +&gpio3 { + gpio-line-names = + "GPIO3_A0","GPIO3_A1","GPIO3_A2","GPIO3_A3","GPIO3_A4","GPIO3_A5","GPIO3_A6","GPIO3_A7", + "GPIO3_B0","GPIO3_B1","GPIO3_B2","GPIO3_B3","GPIO3_B4","GPIO3_B5","GPIO3_B6","GPIO3_B7", + "GPIO3_C0","GPIO3_C1","GPIO3_C2","GPIO3_C3","GPIO3_C4","GPIO3_C5","GPIO3_C6","GPIO3_C7", + "GPIO3_D0","GPIO3_D1", "SMARC_GPIO3", "SMARC_GPIO1", "SMARC_GPIO2", "SMARC_GPIO0","GPIO3_D6","GPIO3_D7"; +}; + +&gpio4 { + gpio-line-names = + "GPIO4_A0","GPIO4_A1","GPIO4_A2","GPIO4_A3","GPIO4_A4","GPIO4_A5","GPIO4_A6","GPIO4_A7", + "GPIO4_B0","GPIO4_B1","GPIO4_B2","GPIO4_B3","GPIO4_B4","GPIO4_B5","GPIO4_B6","GPIO4_B7", + "GPIO4_C0","GPIO4_C1","GPIO4_C2","GPIO4_C3","GPIO4_C4","GPIO4_C5","GPIO4_C6","GPIO4_C7", + "GPIO4_D0","GPIO4_D1","GPIO4_D2","GPIO4_D3","GPIO4_D4","GPIO4_D5","GPIO4_D6","GPIO4_D7"; +}; + + +&gpio3 { + + /* muxes on SOM module */ + + /* rockcip combphy1(multi_phy1) work or in sata mode or in USB3 SS mode */ + /* gpio ctrl on SMARC module: mux combphy1 or to "SMARC SATA1" or to "SMARC USB3_HOST1_SS" */ + /* SATA(SMARC SATA1): SMARC pins: P48,P49,P51,P52 */ + /* USB3(SMARC USB3_HOST1_SS) SMARC pins: S71,S72,S74,S75 */ + sata_usb3_mux_hog: sata_usb3_mux_hog { + gpio-hog; + gpios = <RK_PB5 GPIO_ACTIVE_HIGH>; + /* output-low; */ /* SMARC SATA1 */ + /* output-high; */ /* SMARC USB3_HOST1_SS */ + }; + + /* gpio ctrl on SMARC module: select SMARC pins S139/S140 func: CAN or I2C */ + /* on SMARC pins S139/S140: or CAN(SMARC CAN1) or i2c (I2C_LCD) */ + can_i2c2_mux_hog: can_i2c2_mux_hog { + gpio-hog; + gpios = <RK_PD1 GPIO_ACTIVE_HIGH>; + /* output-low; */ /* CAN */ + /* output-high; */ /* i2c */ + }; +}; + + + +/*2023.06.12: no CAN in mainline kernel now*/ +/ { + can0: can@fe570000 { + compatible = "rockchip,canfd-1.0"; + reg = <0x0 0xfe570000 0x0 0x1000>; + interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru CLK_CAN0>, <&cru PCLK_CAN0>; + clock-names = "baudclk", "apb_pclk"; + resets = <&cru SRST_CAN0>, <&cru SRST_P_CAN0>; + reset-names = "can", "can-apb"; + tx-fifo-depth = <1>; + rx-fifo-depth = <6>; + status = "disabled"; + + pinctrl-names = "default"; + pinctrl-0 = <&can0m0_pins>; + }; + + can2: can@fe590000 { + compatible = "rockchip,canfd-1.0"; + reg = <0x0 0xfe590000 0x0 0x1000>; + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru CLK_CAN2>, <&cru PCLK_CAN2>; + clock-names = "baudclk", "apb_pclk"; + resets = <&cru SRST_CAN2>, <&cru SRST_P_CAN2>; + reset-names = "can", "can-apb"; + tx-fifo-depth = <1>; + rx-fifo-depth = <6>; + status = "disabled"; + + pinctrl-names = "default"; + pinctrl-0 = <&can2m0_pins>; + }; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3568-telematika-smtm.dts b/arch/arm64/boot/dts/rockchip/rk3568-telematika-smtm.dts new file mode 100644 index 0000000000000..535c88fcef20f --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3568-telematika-smtm.dts @@ -0,0 +1,368 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include <dt-bindings/soc/rockchip,vop2.h> +#include "rk3568-inmys-smarc-som_v2.dtsi" + +/ { + model = "SM_TM Motherboard with NMS-SM-RK3568"; + compatible = "telematika,rk3568-sm-tm", "inmys,rk3568-smarc-som", "rockchip,rk3568"; + + leds { + compatible = "gpio-leds"; + + /* i2c mux on Mother board ( D15_i2cmux@74 )*/ + i2cmux_reset { + gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; + default-state = "off"; //on - mux in reset, off - no reset on mux + }; + }; + + watchdog: watchdog { + /* on stm8 MCU, by gpio */ + compatible = "linux,wdt-gpio"; + gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>; + hw_algo = "toggle"; + hw_margin_ms = <1600>; + }; + + vcc24v_dcin: vcc24v-dcin { + compatible = "regulator-fixed"; + regulator-name = "vcc24v_dcin"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <24000000>; + regulator-max-microvolt = <24000000>; + }; + + vcc5v0_mb: vcc5v0-mb { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_mb"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc24v_dcin>; + }; + + vcc3v3_mb: vcc3v3-mb { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_mb"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc24v_dcin>; + }; +}; + +&smarc_vdd_in{ + /* 5V to SOM */ + vin-supply = <&vcc5v0_mb>; +}; + +&gmac0 { + status = "okay"; +}; + +&gmac1 { + status = "okay"; +}; + + +/* HDMI output */ +/{ + hdmi-con { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; +}; + +&gpu { + status = "okay"; +}; + +&hdmi { + status = "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint { + remote-endpoint = <&vp0_out_hdmi>; + }; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + +&vop { + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg = <ROCKCHIP_VOP2_EP_HDMI0>; + remote-endpoint = <&hdmi_in_vp0>; + }; +}; + +&hdmi_sound { + status = "okay"; +}; + +&i2s0_8ch { + status = "okay"; +}; + + +/* end HDMI */ + + +/* mini PCIE connector */ +&combphy2 { + status = "okay"; +}; + +&pcie2x1 { + status = "okay"; +}; +/* end mini PCIE connector */ + + +/* has no sdcard on Motherboard, but has in evm board: rm? */ +&sdmmc0 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart4 { + status = "okay"; +}; + +&uart5 { + status = "okay"; +}; + +&uart8 { + status = "okay"; +}; + + +/* usb*/ +&usb2phy0 { + status = "okay"; +}; + +&usb2phy0_host { + /*phy-supply = <&vcc5v0_usb_host>;*/ + status = "okay"; +}; + +&usb2phy0_otg { + /*phy-supply = <&vcc5v0_usb_otg>;*/ + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host0_xhci { + /*extcon = <&usb2phy0>;*/ + status = "okay"; +}; + + +/* */ +&usb2phy1 { + status = "okay"; +}; + +&usb2phy1_host { + /*phy-supply = <&vcc5v0_usb_host>;*/ + status = "okay"; +}; + +&usb2phy1_otg { + /*phy-supply = <&vcc5v0_usb_host>;*/ + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usb_host1_xhci { + status = "okay"; +}; + + +/* SATA to m.2 connector */ +&combphy1 { + status = "okay"; +}; + +&sata1 { + status = "okay"; +}; +/* end SATA to m.2 connector */ + +/* SMARC: I2C_GP */ +&i2c3{ + status = "okay"; + D15_i2cmux@74 { + compatible = "nxp,pca9546"; + reg = <0x74>; + #address-cells = <1>; + #size-cells = <0>; + // vcc-supply = <®ulator_i2c_3v3>; + // vcc-pullup-supply = <®ulator_i2c_3v3>; + i2c-mux-idle-disconnect; + I2C_MPCI: ch@0 { /* to mini PCIE connector */ + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + I2C_GP_A: ch@1 { /* to stm8 (watchdog) */ + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + I2C_DSI0: ch@2 { /* not connected */ + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + I2C_DSI1: ch@3 { /* not connected */ + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; +}; + +/{ + leds{ + /* rs485/422 A config pins*/ + rs_A_fullduplex_mode{ + gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; + default-state = "on"; //on - RS422, off - RS485 + }; + rs_A_therm_AB{ + gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>; + default-state = "off"; //on - enable 120 Ohm resistor on AB line + }; + rs_A_therm_XY{ + gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_HIGH>; + default-state = "off"; //on - enable 120 Ohm resistor on XY line + }; + + /* rs485/422 B config pins*/ + rs_B_fullduplex_mode { + gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; + default-state = "on"; //on - RS422, off - RS485 + }; + rs_B_therm_AB { + gpios = <&gpio4 RK_PC0 GPIO_ACTIVE_HIGH>; + default-state = "on"; //on - enable 120 Ohm resistor on AB line + }; + rs_B_therm_XY { + gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; + default-state = "on"; //on - enable 120 Ohm resistor on XY line + }; + }; +}; + +&spi0 { + status = "okay"; + spi2uart@0 { + /* spi -> two rs485/422 (A,B) */ + compatible = "nxp,sc16is752"; + reg = <0>; /*cs0*/ + spi-max-frequency = <500000>; /*sc16is752: max 4MHz*/ + clock-frequency = <14745600>; + interrupt-parent = <&gpio4>; + interrupts = <RK_PC3 IRQ_TYPE_LEVEL_LOW>; /* 8*2+3 */ + }; +}; + + +/{ + leds { + /*CAN A config pins*/ + CAN_A_therm { + gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; + default-state = "on"; //on - enable 120 Ohm resistor + }; + + }; +}; + +&can0 { /* SMARC CAN0 -> CAN A */ + status = "okay"; +}; + +/{ + leds { + /*CAN B config pins*/ + CAN_B_therm { + gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; + default-state = "on"; //on - enable 120 Ohm resistor + }; + }; +}; + +&can2 { /* SMARC CAN1 -> CAN B */ + status = "okay"; +}; + +&sata_usb3_mux_hog { + output-low; /* SMARC SATA1 */ + /*output-high;*/ /* SMARC USB3_HOST1_SS */ + + /* selected SMARC SATA1 -> go to m.2 connector*/ +}; + +&can_i2c2_mux_hog { + output-low; /* CAN */ + /* output-high; */ /* i2c */ + + /* selected CAN -> CAN interface on pins S139/S140 */ +}; + +&gpio3 { + + /* gpio ctrl on Mother board: spi->uart IC(spi2uart@0) reset*/ + spi2uart_reset_hog { + gpio-hog; + gpios = <RK_PD3 GPIO_ACTIVE_HIGH>; + output-high; /*no reset */ + }; +}; -- 2.42.2
next prev parent reply other threads:[~2024-08-21 17:07 UTC|newest] Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-08-21 17:07 [d-kernel] [PATCH 0/1] add dts for SoM NMS-SM-RK3568 for kernel 6.11 antohami 2024-08-21 17:07 ` antohami [this message] 2024-08-21 18:33 ` Vitaly Chikunov
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