[d-kernel] [PATCH] arm64: dts: rockchip: Add NMS-SM-EVM v1 Board support

[Daniil Gnusarev <gnusarevda@basealt.ru>]

The NMS-SM-EVM motherboard is designed to route the NMS-SM-RK3568
module's interface signals to external standard connectors.
It includes the following peripherals:
1 x USB 3.0 OTG
2 x USB 2.0 HOST
2 x GbE LAN
1 x PCI-e 2.0 (+ USB 2.0 HOST + I2C_MPCI)
1 x PCI-e 3.0
1 x Serial port (RS-232)
1 x Debug console (UART → USB)
1 x HDMI
2 x MIPI DSI (+ 2 x I2C_DSI)
1 x MIPI CSI
1 x I2S
1 x DP
2 x CAN
1 x SATA
3 x I2C
2 x SPI
1 x PWM
GPIO pins

Link: https://github.com/inmys/buildroot-external-inmys/tree/nms-sm-rk3568-6.12/dts
Signed-off-by: Daniil Gnusarev <gnusarevda@basealt.ru>
---
 arch/arm64/boot/dts/rockchip/Makefile         |   1 +
 .../dts/rockchip/rk3568-inmys-smarc-evm.dts   | 357 ++++++++++++++++++
 2 files changed, 358 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-inmys-smarc-evm.dts

diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 3906bfde7970b4..40241c47f68a9d 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -111,6 +111,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r66s.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r68s.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-inmys-smarc-evm.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-lubancat-2.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-mecsbc.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5c.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-inmys-smarc-evm.dts b/arch/arm64/boot/dts/rockchip/rk3568-inmys-smarc-evm.dts
new file mode 100644
index 00000000000000..6a42410befec3e
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3568-inmys-smarc-evm.dts
@@ -0,0 +1,357 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
+#include "rk3568-inmys-smarc-som_v2.dtsi"
+
+/ {
+	model = "NMS-SM-EVM with NMS-SM-RK3568";
+	compatible = "inmys,rk3568-smarc-evm", "inmys,rk3568-smarc-som", "rockchip,rk3568";
+
+	vcc12v_dcin: vcc12v-dcin {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc12v_dcin";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+	};
+
+	vcc5v0_mb: vcc5v0-mb {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_mb";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&vcc12v_dcin>;
+	};
+
+	vcc3v3_mb: vcc3v3-mb {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc3v3_mb";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vcc12v_dcin>;
+	};
+};
+
+&smarc_vdd_in{
+	/* 5V to SOM */
+	vin-supply = <&vcc5v0_mb>;
+};
+
+&gmac0 {
+	status = "okay";
+};
+
+&gmac1 {
+	status = "okay";
+};
+
+
+/* HDMI output */
+/{
+	hdmi-con {
+		compatible = "hdmi-connector";
+		type = "a";
+
+		port {
+			hdmi_con_in: endpoint {
+				remote-endpoint = <&hdmi_out_con>;
+			};
+		};
+	};
+};
+
+&gpu {
+	status = "okay";
+};
+
+&hdmi {
+	status = "okay";
+};
+
+&hdmi_in {
+	hdmi_in_vp0: endpoint {
+		remote-endpoint = <&vp0_out_hdmi>;
+	};
+};
+
+&hdmi_out {
+	hdmi_out_con: endpoint {
+		remote-endpoint = <&hdmi_con_in>;
+	};
+};
+
+&vop {
+	status = "okay";
+};
+
+&vop_mmu {
+	status = "okay";
+};
+
+&vp0 {
+	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
+		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
+		remote-endpoint = <&hdmi_in_vp0>;
+	};
+};
+
+&hdmi_sound {
+	status = "okay";
+};
+
+&i2s0_8ch {
+	status = "okay";
+};
+
+/* end HDMI */
+
+
+/* mini PCIE connector */
+&combphy2 {
+	status = "okay";
+};
+
+&pcie2x1 {
+	status = "okay";
+};
+/* end mini PCIE connector */
+
+/* PCIE X4 connector */
+&pcie30phy {
+	status = "okay";
+};
+
+&pcie3x2 {
+	status = "okay";
+};
+/* end PCIE X4 connector */
+
+
+&sdmmc0 {
+	status = "okay";
+};
+
+&uart2 {
+	status = "okay";
+};
+
+&uart4 {
+	status = "okay";
+};
+
+&uart5 {
+	status = "okay";
+};
+
+&uart8 {
+	status = "okay";
+};
+
+
+/* USB start */
+&usb2phy0 {
+	status = "okay";
+};
+
+&usb2phy0_host {
+	/*phy-supply = <&vcc5v0_usb_host>;*/
+	status = "okay";
+};
+
+&usb2phy0_otg {
+	/*phy-supply = <&vcc5v0_usb_otg>;*/
+	status = "okay";
+};
+
+&usb_host0_ehci {
+	status = "okay";
+};
+
+&usb_host0_ohci {
+	status = "okay";
+};
+
+&usb_host0_xhci {
+	extcon = <&usb2phy0>;
+	status = "okay";
+};
+&combphy0 { /* USB3_OTG SS */
+	status = "okay";
+};
+
+
+&usb2phy1 {
+	status = "okay";
+};
+
+&usb2phy1_host {
+	/*phy-supply = <&vcc5v0_usb_host>;*/
+	status = "okay";
+};
+
+&usb2phy1_otg {
+	/*phy-supply = <&vcc5v0_usb_host>;*/
+	status = "okay";
+};
+
+&usb_host1_ehci {
+	status = "okay";
+};
+
+&usb_host1_ohci {
+	status = "okay";
+};
+
+&usb_host1_xhci {
+	status = "okay";
+};
+/* end USB*/
+
+
+/* SATA to m.2 connector */
+&combphy1 {
+	status = "okay";
+};
+
+&sata1 {
+	status = "okay";
+};
+/* end SATA to m.2 connector */
+
+
+/* SMARC: I2C_GP */
+&i2c3{
+	status = "okay";
+	i2cgpio: pca9535@20 {
+		compatible = "nxp,pca9535";
+		/* vcc-supply = <&regulator_i2c_1v8 */
+		reg = <0x20>;
+		/*GPIO.3 -> P111 (som) -> gpio3_d2*/
+		interrupt-parent = <&gpio3>;
+		interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+		gpio-line-names =
+			"DSI0_TP_RST_N","DSI1_TP_RST_N","DSI0_RST_N","DSI1_RST_N",
+			"CAM0_PWDN","I2C_GPIO05","I2C_GPIO06","I2C_GPIO07",
+			"I2C_GPIO10","I2C_GPIO11","I2C_GPIO12","I2C_GPIO13",
+			"I2C_GPIO14","I2C_GPIO15","I2C_GPIO16","I2C_GPIO17";
+		cam_pwd {
+			gpio-hog;
+			gpios = <4 GPIO_ACTIVE_HIGH>;
+			output-high;
+		};
+	};
+	/* one of: 0x2c or 0x2e on board*/
+	/* fan control*/
+	u19a: adt7473@2e {
+		compatible = "adi,adt7473";
+		reg = <0x2e>;
+		adi,bypass-attenuator-in0 = <1>;
+		adi,bypass-attenuator-in1 = <1>;
+		adi,bypass-attenuator-in2 = <1>;
+		adi,bypass-attenuator-in3 = <1>;
+		adi,pwm-active-state = <1 1 1>;
+	};
+
+	i2cmux: pca9546a@70 {
+		compatible = "nxp,pca9546";
+		reg = <0x70>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		vcc-supply = <&V3P3>;
+		vcc-pullup-supply = <&V3P3>;
+
+		/*I2C_MUX_RST->GPIO.0 -> P108 (som) -> gpio3_d5*/
+		reset-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
+
+		i2c@0 { /*I2C_DSI1 -> to X25*/
+			reg = <0>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+		i2c@1 { /*I2C_DSI0 -> to X24*/
+			reg = <0>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+		i2c@2 { /*I2C_GP_A -> to X32*/
+			reg = <0>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+		i2c@3 { /*I2C_MPCI -> to minipcie connector*/
+			reg = <0>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+	};
+};
+
+/*SMARC: I2C_CAM0*/
+&i2c4{
+	status = "okay";
+#if 0
+	camera0: imx219@10 {
+		compatible = "sony,imx219";
+		reg = <0x10>;
+		clocks = <&ext_cam_clk>;
+		status = "okay";
+		rockchip,camera-module-index = <0>;
+		rockchip,camera-module-facing = "back";
+		rockchip,camera-module-name = "NC";
+		rockchip,camera-module-lens-name = "NC";
+		port {
+			ucam_out0: endpoint {
+				remote-endpoint = <&mipi_in_ucam0>;
+				data-lanes = <1 2>;
+			};
+		};
+	};
+#endif
+};
+
+
+&spi0 {
+	status = "okay";
+	spidev@0{
+		compatible = "rohm,dh2228fv"; //linux,spidev
+		reg = <0>;
+	};
+};
+
+
+&can0 { /* SMARC CAN0 -> CAN A */
+	status = "okay";
+};
+
+&can2 { /* SMARC CAN1 -> CAN B */
+	status = "okay";
+};
+
+&sata_usb3_mux_hog {
+	output-low; /* SMARC SATA1 */
+	/*output-high;*/ /* SMARC USB3_HOST1_SS */
+
+	/* selected SMARC SATA1 -> go to m.2 connector*/
+};
+
+&can_i2c2_mux_hog {
+	output-low;  /* CAN */
+	/* output-high; */ /* i2c */
+
+	/* selected CAN -> CAN interface on pins S139/S140 */
+};
-- 
2.42.2